Integrated Circuits

CMOS - CD4046, Micropower Phase-Locked Loop, 16-Pin DIP
CD4046B CMOS Micropower Phase-Locked Loop (PLL) consists of a low-power, linear voltage-controlled oscillator (VCO) and two different phase comparators having a common signal-input amplifier and a common comparator input. A 5.2-V zener diode is provided for supply regulation if necessary. Features:
  • Very low power consumption: 70 µW (typ.) at VCO fo = 10 kHz, VDD = 5 V
  • Operating frequency range up to 1.4 MHz (typ.) at VDD = 10 V, RI = 5 k
  • Low frequency drift: 0.04%/°C (typ.) at VDD = 10 V
  • Choice of two phase comparators:
    • Exclusive-OR network (I)
    • Edge-controlled memory network with phase-pulse output for lock indication (II)
  • High VCO linearity: <1% (typ.) at VDD = 10 V
  • VCO inhibit control for ON-OFF keying and ultra-low standby power consumption
  • Source-follower output of VCO control input (Demod.
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